RM0401 Rev 3 739/771
RM0401 Debug support (DBG)
762
26.6 ID codes and locking mechanism
There are several ID codes inside the MCUs. ST strongly recommends tools designers to
lock their debuggers using the MCU DEVICE ID code located in the external PPB memory
map at address 0xE0042000.
26.6.1 MCU device ID code
The MCUs integrate an MCU ID code. This ID identifies the ST MCU part-number and the
die revision. It is part of the DBG_MCU component and is mapped on the external PPB bus
(see Section 26.16 on page 751). This code is accessible using the JTAG debug port (4 to 5
pins) or the SW debug port (two pins) or by the user software. It is even accessible while the
MCU is under system reset.
Only the DEV_ID(11:0) should be used for identification by the debugger/programmer tools.
DBGMCU_IDCODE
Address: 0xE004 2000
Only 32-bits access supported. Read-only.
26.6.2 Boundary scan TAP
JTAG ID code
The TAP of the BSC (boundary scan) integrates a JTAG ID code equal to: 0x0645 8041
26.6.3 Cortex
®
-M4 with FPU TAP
The TAP of the Arm
®
Cortex
®
-M4 with FPU integrates a JTAG ID code. This ID code is the
Arm
®
default one and has not been modified. This code is only accessible by the JTAG
Debug Port.
This code is 0x4BA0 0477 (corresponds to Cortex
®
-M4 with FPU r0p1, see Section 26.2:
Reference Arm® documentation).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
REV_ID
rrrrrr r r r r rrrrrr
1514131211109876543210
Res. Res. Res. Res. DEV_ID
rrrrrrrrrrrr
Bits 31:16 REV_ID(15:0) Revision identifier
This field indicates the revision of the device:
0x1000 = Revision A
Bits 15:12 Reserved, must be kept at reset value.
Bits 11:0 DEV_ID(11:0): Device identifier
The device ID is 0x458
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