RM0401 Rev 3 351/771
RM0401 General-purpose timers (TIM5)
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Figure 115. Counter timing diagram, Update event with ARPE=1 (counter underflow)
Figure 116. Counter timing diagram, Update event with ARPE=1 (counter overflow)
15.3.3 Clock selection
The counter clock can be provided by the following clock sources:
• Internal clock (CK_INT)
• External clock mode1: external input pin (TIx)
• Internal trigger inputs (ITRx): using one timer as prescaler for another timer.
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