Fast-mode Plus Inter-integrated circuit (FMPI2C) interface RM0401
560/771 RM0401 Rev 3
Timeouts
This peripheral embeds hardware timers in order to be compliant with the 3 timeouts defined
in SMBus specification.
Figure 200. Timeout intervals for t
LOW:SEXT
, t
LOW:MEXT
.
Table 93. SMBus timeout specifications
Symbol Parameter
Limits
Unit
Min Max
t
TIMEOUT
Detect clock low timeout 25 35 ms
t
LOW:SEXT
(1)
1. t
LOW:SEXT
is the cumulative time a given slave device is allowed to extend the clock cycles in one message
from the initial START to the STOP. It is possible that, another slave device or the master also extends the
clock causing the combined clock low extend time to be greater than t
LOW:SEXT
. Therefore, this parameter is
measured with the slave device as the sole target of a full-speed master.
Cumulative clock low extend time (slave device) - 25 ms
t
LOW:MEXT
(2)
2. t
LOW:MEXT
is the cumulative time a master device is allowed to extend its clock cycles within each byte of a
message as defined from START-to-ACK, ACK-to-ACK, or ACK-to-STOP. It is possible that a slave device
or another master also extends the clock causing the combined clock low time to be greater than t
LOW:MEXT
on a given byte. Therefore, this parameter is measured with a full speed slave device as the sole target of
the master.
Cumulative clock low extend time (master device) - 10 ms
069
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