Serial peripheral interface/ inter-IC sound (SPI/I2S) RM0401
712/771 RM0401 Rev 3
Figure 268. Example of 16-bit data frame extended to 32-bit channel frame
In transmission mode, when a TXE event occurs, the application has to write the data to be
transmitted (in this case 0x76A3). The 0x000 field is transmitted first (extension on 32-bit).
The TXE flag is set again as soon as the effective data (0x76A3) is sent on SD.
In reception mode, RXNE is asserted as soon as the significant half-word is received (and
not the 0x0000 field).
In this way, more time is provided between two write or read operations to prevent underrun
or overrun conditions.
PCM standard
For the PCM standard, there is no need to use channel-side information. The two PCM
modes (short and long frame) are available and configurable using the PCMSYNC bit in
SPIx_I2SCFGR register.
Figure 269. PCM standard waveforms (16-bit)
For long frame synchronization, the WS signal assertion time is fixed to 13 bits in master
mode.
For short frame synchronization, the WS synchronization signal is only one cycle long.
Figure 270. PCM standard waveforms (16-bit extended to 32-bit packet frame)
[$
2QO\RQHDFFHVVWRWKH63,['5UHJLVWHU
069
069
&.
:6
VKRUWIUDPH
6'
:6
ORQJIUDPH
ELWV
06%
/6%
06%
069
&.
:6
VKRUWIUDPH
6'
:6
ORQJIUDPH
8SWRELWV
06%
/6%
ELWV
To Next Page
Loading...
Need help?
General
