ST STM32F410

RM0401 Rev 3 543/771
RM0401 Fast-mode Plus Inter-integrated circuit (FMPI2C) interface
591
Slave receiver
RXNE is set in FMPI2C_ISR when the FMPI2C_RXDR is full, and generates an interrupt if
RXIE is set in FMPI2C_CR1. RXNE is cleared when FMPI2C_RXDR is read.
When a STOP is received and STOPIE is set in FMPI2C_CR1, STOPF is set in
FMPI2C_ISR and an interrupt is generated.
Figure 187. Transfer sequence flowchart for slave receiver with NOSTRETCH=0
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