RM0401 Rev 3 39/771
RM0401
44
All the memory map areas that are not allocated to on-chip memories and peripherals are
considered “Reserved”. For the detailed mapping of available memory and register areas,
refer to the following table.
The following table gives the boundary addresses of the peripherals available in the
devices.
Table 1. Register boundary addresses
Bus Boundary address Peripheral
-
0xE010 0000 - 0xFFFF FFFF Reserved
Cortex
®
-M4 0xE000 0000 - 0xE00F FFFF Cortex-M4 internal peripherals
-
0x5000 0000 - 0xDFFF FFFF Reserved
AHB1
0x4008 0400 - 0x4FFF FFFF Reserved
0x4008 0000 - 0x4008 03FF RNG
0x4002 6800 - 0x4007 FFFF Reserved
0x4002 6400 - 0x4002 67FF DMA2
0x4002 6000 - 0x4002 63FF DMA1
0x4002 5000 - 0x4002 4FFF Reserved
0x4002 3C00 - 0x4002 3FFF Flash interface register
0x4002 3800 - 0x4002 3BFF RCC
0x4002 3400 - 0x4002 37FF Reserved
0x4002 3000 - 0x4002 33FF CRC
0x4002 2800 - 0x4002 2FFF Reserved
0x4002 2400 - 0x4002 27FF LPTIM1
0x4002 2000 - 0x4002 23FF Reserved
0x4002 1C00 - 0x4002 1FFF GPIOH
0x4002 0C00 - 0x4002 1BFF Reserved
0x4002 0800 - 0x4002 0BFF GPIOC
0x4002 0400 - 0x4002 07FF GPIOB
0x4002 0000 - 0x4002 03FF GPIOA
To Next Page
Loading...
Need help?
General
