RM0401 Rev 3 765/771
RM0401 Revision history
765
28 Revision history
Table 146. Document revision history
Date Revision Changes
07-Sep-2015 1 Initial release.
26-Oct-2015 2
System and memory overview
Updated Figure 2: Memory map.
Interrupts and events (EXTI)
Updated Section 9.1.2: SysTick calibration value register.
Analog-to-digital converted (ADC)
Removed note in Section : Temperature sensor, V
REFINT
and V
BAT
internal channels.
Digital-to-analog converted (DAC)
Updated Section 12.5.3: DAC output voltage.
Timer 11 (TIM11)
Updated TI1_RMP in Section 16.5.11: TIM11 option register 1
(TIM11_OR).
Real-time clock (RTC)
Updated Figure 175: RTC block diagram.
Universal synchronous asynchronous receiver transmitter
(USART)
Replaced section USART mode configuration by Section 24.3: USART
implementation.
Inter-integrated circuit interface (I2C)
Updated Section 22.4.5: FMPI2C initialization, including Figure 179:
Setup and hold timings.
Updated Section 22.7.5: Timing register (FMPI2C_TIMINGR).
Serial peripheral interface/ inter-IC sound (SPI/I2S)
Updated Figure 240, Figure 241, Figure 242 and Figure 243.
Updated and added notes below Figure 240, Figure 241 and
Figure 242.
Added Section 25.3.4: Multi-master communication.
29-Nov-2018 3
Updated:
– Table 3: Embedded bootloader interfaces
– Table 5: Flash module organization
– Section 13: True random number generator (RNG)
– Section 18: Low-power timer (LPTIM)
– Section 22.6: FMPI2C interrupts