EasyManuals Logo

ST STM32F410 User Manual

ST STM32F410
771 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #287 background imageLoading...
Page #287 background image
RM0401 Rev 3 287/771
RM0401 Advanced-control timers (TIM1)
339
1. As no filter is needed in this example, write ETF[3:0]=0000 in the TIMx_SMCR register.
2. Set the prescaler by writing ETPS[1:0]=01 in the TIMx_SMCR register
3. Select rising edge detection on the ETR pin by writing ETP=0 in the TIMx_SMCR
register
4. Enable external clock mode 2 by writing ECE=1 in the TIMx_SMCR register.
5. Enable the counter by writing CEN=1 in the TIMx_CR1 register.
The counter counts once each 2 ETR rising edges.
The delay between the rising edge on ETR and the actual clock of the counter is due to the
resynchronization circuit on the ETRP signal.
Figure 74. Control circuit in external clock mode 2
14.3.5 Capture/compare channels
Each Capture/Compare channel is built around a capture/compare register (including a
shadow register), a input stage for capture (with digital filter, multiplexing and prescaler) and
an output stage (with comparator and output control).
Figure 75 to Figure 78 give an overview of one Capture/Compare channel.
The input stage samples the corresponding TIx input to generate a filtered signal TIxF.
Then, an edge detector with polarity selection generates a signal (TIxFPx) which can be
used as trigger input by the slave mode controller or as the capture command. It is
prescaled before the capture register (ICxPS).
069
  
I
&.B,17
&17B(1
(75
(753
(75)
&RXQWHUFORFN 
&.B,17 &.B36&
&RXQWHUUHJLVWHU

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32F410 and is the answer not in the manual?

ST STM32F410 Specifications

General IconGeneral
BrandST
ModelSTM32F410
CategoryMicrocontrollers
LanguageEnglish

Related product manuals