RM0401 Rev 3 639/771
RM0401 Universal synchronous receiver transmitter (USART) /universal asynchronous receiver
679
receiver tolerance to clock deviation). In this case the NF bit will never be set.
When noise is detected in a frame:
• The NF bit is set at the rising edge of the RXNE bit.
• The invalid data is transferred from the Shift register to the USART_DR register.
• No interrupt is generated in case of single byte communication. However this bit rises
at the same time as the RXNE bit that itself generates an interrupt. In case of
multibuffer communication an interrupt will be issued if the EIE bit is set in the
USART_CR3 register.
The NF bit is reset by a USART_SR register read operation followed by a USART_DR
register read operation.
Note: Oversampling by 8 is not available in the Smartcard, IrDA and LIN modes. In those modes,
the OVER8 bit is forced to ‘0 by hardware.
Figure 219. Data sampling when oversampling by 16
Figure 220. Data sampling when oversampling by 8
Table 106. Noise detection from sampled data
Sampled value NE status Received bit value
000 0 0
001 1 0
06Y9
VDPSOHGYDOXHV
2QHELWWLPH
6DPSOHFORFN
5;OLQH
06Y9
VDPSOHGYDOXHV
2QHELWWLPH
6DPSOH
FORFN[
5;OLQH
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