Low-power timer (LPTIM) RM0401
460/771 RM0401 Rev 3
Figure 172. Encoder mode counting sequence
18.4.15 Debug mode
When the microcontroller enters debug mode (core halted), the LPTIM counter either
continues to work normally or stops, depending on the DBG_LPTIM_STOP configuration bit
in the DBGMCU module.
18.5 LPTIM low-power modes
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7
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Table 75. Effect of low-power modes on the LPTIM
Mode Description
Sleep No effect. LPTIM interrupts cause the device to exit Sleep mode.
Stop
The LPTIM peripheral is active when it is clocked by LSE or LSI. LPTIM
interrupts cause the device to exit Stop mode
Standby
The LPTIM peripheral is powered down and must be reinitialized after
exiting Standby mode.
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