RM0401 Rev 3 449/771
RM0401 Basic timers (TIM6)
449
17.4.9 TIM6 register map
TIMx registers are mapped as 16-bit addressable registers as described in the table below:
Refer to Section 2.2 on page 41 for the register boundary addresses.
Table 70. TIM6 register map and reset values
Offset Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x00
TIMx_CR1
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
ARPE
Res.
Res.
Res.
OPM
URS
UDIS
CEN
Reset value 0 0000
0x04
TIMx_CR2
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
MMS[2:0]
Res.
Res.
Res.
Res.
Reset value 0 0 0
0x08 Res.
0x0C
TIMx_DIER
Res.
Res.
Res.
Res.
Res.
Res.
Res.
UDE
Res.
Res.
Res.
Res.
Res.
Res.
Res.
UIE
Reset value 0 0
0x10
TIMx_SR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
UIF
Reset value 0
0x14
TIMx_EGR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
UG
Reset value 0
0x18 Res.
0x1C Res.
0x20 Res.
0x24
TIMx_CNT CNT[15:0]
Reset value 0000000000 0 00000
0x28
TIMx_PSC PSC[15:0]
Reset value 0000000000 0 00000
0x2C
TIMx_ARR ARR[15:0]
Reset value 1111111111 1 11111
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