ST STM32F410 User Manual

Universal synchronous receiver transmitter (USART) /universal asynchronous receiver transmit-
646/771 RM0401 Rev 3
8 896 KBps NA NA NA 888.889 KBps 1.1250 0.79%
9 921.6 KBps NA NA NA 941.176 KBps 1.0625 2.12%
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
Table 112. Error calculation for programmed baud rates at f
PCLK
= 8 MHz or f
PCLK
= 16 MHz,
oversampling by 8
(1)
Oversampling by 8 (OVER8=1)
Baud rate f
PCLK
= 8 MHz f
PCLK
= 16 MHz
S.No Desired Actual
Value
programmed
in the baud
rate register
% Error =
(Calculated -
Desired)B.Rate
/Desired B.Rate
Actual
Value
programmed
in the baud
rate register
%
Error
1 2.4 KBps 2.400 KBps 416.625 0.01% 2.400 KBps 833.375 0.00%
2 9.6 KBps 9.604 KBps 104.125 0.04% 9.598 KBps 208.375 0.02%
3 19.2 KBps 19.185 KBps 52.125 0.08% 19.208 KBps 104.125 0.04%
4 57.6 KBps 57.557 KBps 17.375 0.08% 57.554 KBps 34.750 0.08%
5 115.2 KBps 115.942 KBps 8.625 0.64% 115.108 KBps 17.375 0.08%
6 230.4 KBps 228.571 KBps 4.375 0.79% 231.884 KBps 8.625 0.64%
7 460.8 KBps 470.588 KBps 2.125 2.12% 457.143 KBps 4.375 0.79%
8 896 KBps 888.889 KBps 1.125 0.79% 888.889 KBps 2.250 0.79%
9 921.6 KBps 888.889 KBps 1.125 3.55% 941.176 KBps 2.125 2.12%
10 1.792 MBps NA NA NA 1.7777 MBps 1.125 0.79%
11 1.8432 MBps NA NA NA 1.7777 MBps 1.125 3.55%
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
Table 111. Error calculation for programmed baud rates at f
PCLK
= 8 MHz or f
PCLK
= 16 MHz,
oversampling by 16
(1)
(continued)
Oversampling by 16 (OVER8=0)
Baud rate f
PCLK
= 8 MHz f
PCLK
= 16 MHz
S.No Desired Actual
Value
programmed
in the baud
rate register
% Error =
(Calculated -
Desired)B.Rate
/Desired B.Rate
Actual
Value
programmed
in the baud
rate register
% Error

ST STM32F410 Specifications

General

Brand	ST
Model	STM32F410
Category	Microcontrollers
Language	English