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ST STM32F410 User Manual

ST STM32F410
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Page #265 background image
RM0401 Rev 3 265/771
RM0401 True random number generator (RNG)
268
13.8 RNG registers
The RNG is associated with a control register, a data register and a status register.
13.8.1 RNG control register (RNG_CR)
Address offset: 0x000
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. CED Res. IE RNGEN Res. Res.
rw rw rw
Bits 31:6 Reserved, must be kept at reset value
Bit 5 CED: Clock error detection
0: Clock error detection is enable
1: Clock error detection is disable
The clock error detection cannot be enabled nor disabled on-the-fly when the RNG is
enabled, i.e. to enable or disable CED the RNG must be disabled.
Bit 4 Reserved, must be kept at reset value.
Bit 3 IE: Interrupt Enable
0: RNG Interrupt is disabled
1: RNG Interrupt is enabled. An interrupt is pending as soon as DRDY=’1’, SEIS=’1’ or
CEIS=’1’ in the RNG_SR register.
Bit 2 RNGEN: True random number generator enable
0: True random number generator is disabled. Analog noise sources are powered off and
logic clocked by the RNG clock is gated.
1: True random number generator is enabled.
Bits 1:0 Reserved, must be kept at reset value.

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ST STM32F410 Specifications

General IconGeneral
SeriesSTM32F4
CoreARM Cortex-M4
Max Clock Speed100 MHz
Maximum CPU frequency100 MHz
Program memory sizeUp to 128 KB
Program memory typeFlash
SRAM32 KB
RAM size32 KB
GPIO PinsUp to 50
Number of I/OsUp to 50
ADC ChannelsUp to 10
ADC12-bit
DAC Channels1
Timers6
Communication InterfacesI2C, SPI, USART, USB
Operating voltage1.7 V to 3.6 V
Operating Temperature-40°C to 85°C
PackageLQFP64

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