ST STM32F410

General-purpose timers (TIM5) RM0401
350/771 RM0401 Rev 3
Figure 112. Counter timing diagram, internal clock divided by 2
Figure 113. Counter timing diagram, internal clock divided by 4, TIMx_ARR=0x36
1. Center-aligned mode 2 or 3 is used with an UIF on overflow.
Figure 114. Counter timing diagram, internal clock divided by N
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