Interrupts and events RM0401
200/771 RM0401 Rev 3
15 22 settable DMA1_Stream4 DMA1 Stream4 global interrupt 0x0000 007C
16 23 settable DMA1_Stream5 DMA1 Stream5 global interrupt 0x0000 0080
17 24 settable DMA1_Stream6 DMA1 Stream6 global interrupt 0x0000 0084
18 25 settable ADC ADC1 global interrupts 0x0000 0088
19 to
22
- - - Reserved
0x0000 008C to
0x0000 0098
23 30 settable EXTI9_5 EXTI Line[9:5] interrupts 0x0000 009C
24 31 settable TIM1_BRK_TIM9
TIM1 Break interrupt and TIM9 global
interrupt
0x0000 00A0
25 32 settable TIM1_UP TIM1 Update interrupt 0x0000 00A4
26 33 settable TIM1_TRG_COM_TIM11
TIM1 Trigger and Commutation interrupts
and TIM11 global interrupt
0x0000 00A8
27 34 settable TIM1_CC TIM1 Capture Compare interrupt 0x0000 00AC
28 to
30
- - - Reserved
0x0000 00B0 to
0x0000 00B8
31 38 settable I2C1_EV I
2
C1 event interrupt 0x0000 00BC
32 39 settable I2C1_ER I
2
C1 error interrupt 0x0000 00C0
33 40 settable I2C2_EV I
2
C2 event interrupt 0x0000 00C4
34 41 settable I2C2_ER I
2
C2 error interrupt 0x0000 00C8
35 42 settable SPI1 SPI1 global interrupt 0x0000 00CC
36 43 settable SPI2 SPI2 global interrupt 0x0000 00D0
37 44 settable USART1 USART1 global interrupt 0x0000 00D4
38 45 settable USART2 USART2 global interrupt 0x0000 00D8
39 - - - Reserved 0x0000 00DC
40 47 settable EXTI15_10 EXTI Line[15:10] interrupts 0x0000 00E0
41 48 settable EXTI17 / RTC_Alarm
EXTI Line 17 interrupt / RTC Alarms (A and
B) through EXTI line interrupt
0x0000 00E4
42 to
46
- - - Reserved
0x0000 00E8 to
0x0000 00F8
47 54 settable DMA1_Stream7 DMA1 Stream7 global interrupt 0x0000 00FC
48 to
49
--
- Reserved
0x0000 0100 to
0x0000 0104
50 57 settable TIM5 TIM5 global interrupt 0x0000 0108
Table 39. Vector table (continued)
Position
Priority
Type of
priority
Acronym Description Address