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ST STM32F410 User Manual

ST STM32F410
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Contents RM0401
22/771 RM0401 Rev 3
25.7.5 SPI CRC polynomial register (SPI_CRCPR) (not used in I
2
S
mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 726
25.7.6 SPI RX CRC register (SPI_RXCRCR) (not used in I
2
S mode) . . . . . . 727
25.7.7 SPI TX CRC register (SPI_TXCRCR) (not used in I
2
S mode) . . . . . . 727
25.7.8 SPI_I
2
S configuration register (SPI_I2SCFGR) . . . . . . . . . . . . . . . . . . 728
25.7.9 SPI_I
2
S prescaler register (SPI_I2SPR) . . . . . . . . . . . . . . . . . . . . . . . 729
25.7.10 SPI register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 731
26 Debug support (DBG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 732
26.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 732
26.2 Reference Arm® documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 733
26.3 SWJ debug port (serial wire and JTAG) . . . . . . . . . . . . . . . . . . . . . . . . . 733
26.3.1 Mechanism to select the JTAG-DP or the SW-DP . . . . . . . . . . . . . . . . 734
26.4 Pinout and debug port pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 734
26.4.1 SWJ debug port pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 735
26.4.2 Flexible SWJ-DP pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . 735
26.4.3 Internal pull-up and pull-down on JTAG pins . . . . . . . . . . . . . . . . . . . . 736
26.4.4 Using serial wire and releasing the unused debug pins as GPIOs . . . 737
26.5 JTAG TAP connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 737
26.6 ID codes and locking mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 739
26.6.1 MCU device ID code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 739
26.6.2 Boundary scan TAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 739
26.6.3 Cortex
®
-M4 with FPU TAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 739
26.6.4 Cortex
®
-M4 with FPU JEDEC-106 ID code . . . . . . . . . . . . . . . . . . . . . 740
26.7 JTAG debug port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 740
26.8 SW debug port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 742
26.8.1 SW protocol introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 742
26.8.2 SW protocol sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 742
26.8.3 SW-DP state machine (reset, idle states, ID code) . . . . . . . . . . . . . . . 743
26.8.4 DP and AP read/write accesses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 743
26.8.5 SW-DP registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 744
26.8.6 SW-AP registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 745
26.9 AHB-AP (AHB access port) - valid for both JTAG-DP
and SW-DP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 745
26.10 Core debug . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 746
26.11 Capability of the debugger host to connect under system reset . . . . . . 747

Table of Contents

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ST STM32F410 Specifications

General IconGeneral
BrandST
ModelSTM32F410
CategoryMicrocontrollers
LanguageEnglish

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