Digital-to-analog converter (DAC) RM0401
252/771 RM0401 Rev 3
Bits 5:3 TSEL1[2:0]: DAC channel1 trigger selection
These bits select the external event used to trigger DAC channel1.
011: TIM5 TRGO event
110: EXTI line9
111: Software trigger
Note: Only used if bit TEN1 = 1 (DAC channel1 trigger enabled).
Bit 2 TEN1: DAC channel1 trigger enable
This bit is set and cleared by software to enable/disable DAC channel1 trigger.
0: DAC channel1 trigger disabled and data written into the DAC_DHRx register are
transferred one APB1 clock cycle later to the DAC_DOR1 register
1: DAC channel1 trigger enabled and data from the DAC_DHRx register are transferred
three APB1 clock cycles later to the DAC_DOR1 register
Note: When software trigger is selected, the transfer from the DAC_DHRx register to the
DAC_DOR1 register takes only one APB1 clock cycle.
Bit 1 BOFF1: DAC channel1 output buffer disable
This bit is set and cleared by software to enable/disable DAC channel1 output buffer.
0: DAC channel1 output buffer enabled
1: DAC channel1 output buffer disabled
Bit 0 EN1: DAC channel1 enable
This bit is set and cleared by software to enable/disable DAC channel1.
0: DAC channel1 disabled
1: DAC channel1 enabled
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