Automationdirect.com DL05 - Page 448

Appendix C
Inst. Execution Times
C–6
Instruction Execution Times
Comparative Boolean (cont.)
DL05
Instruct Legal Data Types Execute Not Execute
ANDE 1st 2nd
V: Data Reg. V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
V: Bit Reg. V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
P:Indir. (Data) V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
P:Indir. (Bit) V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.6 ms
16.6 ms
11.5 m s
42.6 ms
42.6 ms
16.6 ms
16.6 ms
11.5 m s
42.6 ms
42.6 ms
42.6 ms
42.6 ms
37.7 ms
66.5 ms
66.5 ms
42.6 ms
42.6 ms
37.7 ms
66.5 ms
66.5 ms
16.5 ms
16.5 ms
11.4 ms
42.5 ms
42.5 ms
16.5 ms
16.5 ms
11.4 ms
42.5 ms
42.5 ms
42.5 ms
42.5 ms
37.6 ms
66.3 ms
66.3 ms
42.5 ms
42.5 ms
37.6 ms
66.3 ms
66.3 ms
ANDNE 1st 2nd
V: Data Reg. V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
V: Bit Reg. V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
P:Indir. (Data) V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
P:Indir. (Bit) V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.7 ms
16.7 ms
11.6 m s
42.7 ms
42.7 ms
16.7 ms
16.7 ms
11.6 m s
42.7 ms
42.7 ms
42.7 ms
42.7 ms
37.9 ms
66.6 ms
66.6 ms
42.7 ms
42.7 ms
37.9 ms
66.6 ms
66.6 ms
16.8 ms
16.8 ms
11.7 ms
42.9 ms
42.9 ms
16.8 ms
16.8 ms
11.7 ms
42.9 ms
42.9 ms
42.9 ms
42.9 ms
38.1 ms
66.8 ms
66.8 ms
42.9 ms
42.9 ms
38.1 ms
66.8 ms
66.8 ms