12.5.6 Slave Transmission/Reception .......................................................................................... 444
12.5.7 Calculating Transfer Clock Frequency ............................................................................... 455
12.5.8 Procedure for Processing Errors that Occurred During Simplified SPI (CSI00, CSI01)
Communication .................................................................................................................. 457
12.6 Operation of UART (UART0) Communication .............................................................................. 458
12.6.1 UART Transmission ........................................................................................................... 460
12.6.2 UART Reception ................................................................................................................ 470
12.6.3 Calculating Baud Rate ....................................................................................................... 477
12.6.4 Procedure for Processing Errors that Occurred During UART (UART0) Communication . 482
12.7 Operation of Simplified I
2
C (IIC00, IIC01) Communication .......................................................... 483
12.7.1 Address Field Transmission ............................................................................................... 485
12.7.2 Data Transmission ............................................................................................................. 491
12.7.3 Data Reception .................................................................................................................. 495
12.7.4 Stop Condition Generation ................................................................................................. 500
12.7.5 Calculating Transfer Rate .................................................................................................. 501
12.7.6 Procedure for Processing Errors that Occurred during Simplified I
2
C (IIC00, IIC01)
Communication .................................................................................................................. 504
CHAPTER 13 SERIAL INTERFACE IICA ...................................................................... 505
13.1 Functions of Serial Interface IICA ................................................................................................. 505
13.2 Configuration of Serial Interface IICA ........................................................................................... 508
13.3 Registers Controlling Serial Interface IICA ................................................................................... 512
13.3.1 Peripheral enable register 0 (PER0) .................................................................................. 513
13.3.2 IICA control register 00 (IICCTL00) ................................................................................... 514
13.3.3 IICA status register 0 (IICS0) ............................................................................................. 518
13.3.4 IICA flag register 0 (IICF0) ................................................................................................. 521
13.3.5 IICA control register 01 (IICCTL01) ................................................................................... 523
13.3.6 IICA low-level width setting register 0 (IICWL0) ................................................................ 526
13.3.7 IICA high-level width setting register 0 (IICWH0) .............................................................. 526
13.3.8 Registers controlling port functions of IICA serial input/output pins .................................. 527
13.4 I
2
C Bus Mode Functions ............................................................................................................... 528
13.4.1 Pin configuration ................................................................................................................ 528
13.4.2 Setting transfer clock by using IICWL0 and IICWH0 registers .......................................... 529
13.5 I
2
C Bus Definitions and Control Methods ..................................................................................... 531
13.5.1 Start condition .................................................................................................................... 532
13.5.2 Address .............................................................................................................................. 533
13.5.3 Transfer direction specification .......................................................................................... 534
13.5.4 Acknowledge (ACK) ........................................................................................................... 534
13.5.5 Stop condition .................................................................................................................... 536
13.5.6 Clock stretching .................................................................................................................. 537
13.5.7 Releasing clock stretching ................................................................................................. 539
13.5.8 Interrupt request (INTIICA0) generation timing and clock stretching control ..................... 540
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