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Renesas RL78/G15

Renesas RL78/G15
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RL78/G15 CHAPTER 16 RESET FUNCTION
R01UH0959EJ0110 Rev.1.10 Page 641 of 765
Mar 7, 2023
16.3 Register for Confirming Reset Source
16.3.1 Reset Control Flag Register (RESF)
Many internal reset generation sources exist in the RL78 microcontroller. The reset control flag register (RESF) is used
to store which source has generated the reset request.
The RESF register can be read by an 8-bit memory manipulation instruction.
The external reset, a reset by the data retention lower limit voltage, and reading the RESF register clear TRAP, WDTRF,
IAWRF, and SPORF flags.
Figure 16-4. Format of Reset Control Flag Register (RESF)
Address: FFFA8H After reset: Undefined
Note 1
R
Symbol 7 6 5 4 3 2 1 0
RESF TRAP 0 0 WDTRF 0 0 IAWRF SPORF
TRAP Internal reset request by execution of illegal instruction
Note 2
0 Internal reset request is not generated, or the RESF register is cleared.
1 Internal reset request is generated.
WDTRF Internal reset request by watchdog timer (WDT)
0 Internal reset request is not generated, or the RESF register is cleared.
1 Internal reset request is generated.
IAWRF Internal reset request t by illegal-memory access
0 Internal reset request is not generated, or the RESF register is cleared.
1 Internal reset request is generated.
SPORF Internal reset request by selectable power-on reset (SPOR) circuit
0 Internal reset request is not generated, or the RESF register is cleared.
1 Internal reset request is generated.
Note 1. The value after reset varies depending on the reset source.
Note 2. The illegal instruction is generated when instruction code FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the on-chip debug emulator.
Caution Do not read data by a 1-bit memory manipulation instruction.

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