RL78/G15 CHAPTER 3 CPU ARCHITECTURE
R01UH0959EJ0110 Rev.1.10 Page 65 of 765
Mar 7, 2023
3.3 Processor Registers
The RL78/G15 products incorporate the following processor registers.
3.3.1 Control registers
The control registers control the program sequence, status, and stack memory. The control registers consist of a
program counter (PC), a program status word (PSW) and a stack pointer (SP).
(1) Program counter (PC)
The program counter is a 20-bit register that holds the address information of the next program to be executed.
In normal operation, PC is automatically incremented according to the number of bytes of the instruction to be fetched.
When a branch instruction is executed, immediate data and register contents are set.
Reset signal generation sets the reset vector table values at addresses 00000H and 00001H to the 16 lower-order bits of
the program counter. The four higher-order bits of the program counter are cleared to 0000.
Figure 3-4. Format of Program Counter
Symbol 19 0
PC
(2) Program status word (PSW)
The program status word is an 8-bit register consisting of various flags set/reset by instruction execution.
Program status word contents are stored in the stack area upon vectored interrupt request is acknowledged or PUSH
PSW instruction execution and are restored upon execution of the RETB, RETI and POP PSW instructions.
Reset signal generation sets the PSW register to 06H.
Figure 3-5. Format of Program Status Word
Symbol 7 6 5 4 3 2 1 0
PSW IE Z RBS1 AC RBS0 ISP1 ISP0 CY
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