RL78/G15 CHAPTER 6 TIMER ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 175 of 765
Mar 7, 2023
6.2.2 Timer data register mn (TDRmn)
This is a 16-bit register from which a capture function and a compare function can be selected. The capture or compare
function can be switched by selecting an operation mode by using the MDmn3 to MDmn0 bits of timer mode register mn
(TMRmn).
The value of the TDRmn register can be changed at any time.
This register can be read or written in 16-bit units.
In addition, for the TDRm1 and TDRm3 registers, while in the 8-bit timer mode (when the SPLITm1, SPLITm3 bits of
timer mode registers m1 and m3 (TMRm1, TMRm3) are 1), it is possible to read and write the data in 8-bit units, with
TDRm1H and TDRm3H used as the higher 8 bits, and TDRm1L and TDRm3L used as the lower 8 bits.
Reset signal generation clears this register to 0000H.
Figure 6-7. Format of Timer Data Register mn (TDRmn) (n = 0, 2, 4 to 7)
Address: FFF18H, FFF19H (TDR00), FFF64H, FFF65H (TDR02), FFF68H, FFF69H (TDR04) to FFF6EH, FFF6FH (TDR07)
After reset: 0000H R/W
FFF19H (TDR00) FFF18H (TDR00)
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TDRmn
Figure 6-8. Format of Timer Data Register mn (TDRmn) (n = 1, 3)
Address: FFF1AH, FFF1BH (TDR01), FFF66H, FFF67H (TDR03) After reset: 0000H R/W
FFF1BH (TDR01H) FFF1AH (TDR01L)
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TDRmn
(i) When timer data register mn (TDRmn) is used as compare register
Counting down is started from the value set to the TDRmn register. When the count value reaches 0000H, an interrupt
signal (INTTMmn) is generated. The TDRmn register holds its value until it is rewritten.
Caution The TDRmn register does not perform a capture operation even if a capture trigger is input, when it is
set to the compare function.
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