RL78/G15 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 395 of 765
Mar 7, 2023
12.4.2 Stopping the Operation by Channels
The stopping of the operation by channels is set using each of the following registers.
Figure 12-20. Each Register Setting When Stopping the Operation by Channels (1/2)
(a) Serial channel stop register m (STm) … The STm is a trigger register that is used to enable stopping
communication/count by each channel.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
STm
STm1
STm0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/1 0/1
1: Clears the SEmn bit to 0 and stops the communication operation
*Because the STmn bit is a trigger bit, it is cleared immediately when SEmn = 0.
(b) Serial channel enable status register m (SEm) … This register indicates whether data transmission/reception
operation of each channel is enabled or stopped.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SEm
SEm1
SEm0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/1 0/1
0: Operation stops
*The SEm is a read-only status register, whose operation is stopped by using the STm register.
With a channel whose operation is stopped, the value of the CKOmn bit of the SOm register can be set by software.
(c) Serial output enable register m (SOEm) … This register is used to enable or stop output of the serial communication
operation of each channel.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SOEm
SOEm
1
SOEm
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0/1 0/1
0: Stops output by serial communication operation
*For channel n, whose serial output is stopped, the SOmn bit value of the SOm register can be set by software.
(Remarks are listed on the next page.)