RL78/G15 CHAPTER 10 A/D CONVERTER
R01UH0959EJ0110 Rev.1.10 Page 344 of 765
Mar 7, 2023
10.9.6 Input impedance of analog input (ANIn) pins
This A/D converter charges a sampling capacitor for sampling during sampling time.
Therefore, only a leakage current flows when sampling is not in progress, and a current that charges the capacitor flows
during sampling. Consequently, the input impedance fluctuates depending on whether sampling is in progress, and on
the other states.
To make sure that sampling is effective, however, keep the output impedance of the analog input source at no greater
than 1 kΩ. If the output impedance is high, we recommend connecting a capacitor of about 0.1 μF between the ANI0 to
ANI10
Note 1
pins and the ground (see Figure 10-22).
Note 1. ANI0, ANI2, ANI3 for 8-pin products,
ANI0 to ANI3 for 10-pin products,
ANI0 to ANI6 for 16-pin products
10.9.7 Interrupt request flag (ADIF)
The interrupt request flag (ADIF) is not cleared even if the analog input channel specification register (ADS) is changed.
When A/D conversion is to be stopped and then resumed, clear the ADIF flag before resuming the A/D conversion.
10.9.8 Conversion results just after A/D conversion start
The first A/D conversion value immediately after A/D conversion starts may not fall within the rating range if the ADCS bit
is set to 1 within 0.125 μs after the ADCE bit was set to 1. Take measures such as polling the A/D conversion end
interrupt request signal (INTAD) and removing the first conversion result.
10.9.9 A/D conversion result register (ADCR, ADCRH) read operation
When a write operation is performed to A/D converter mode register 0 (ADM0), the analog input channel specification
register (ADS), and port mode control register (PMCx), the contents of the ADCR and ADCRH registers may become
undefined and a correct conversion result may not be read. After conversion ends, read the conversion result before
writing to the ADM0, ADS, or PMCx register.
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