RL78/G15 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 385 of 765
Mar 7, 2023
12.3.9 Serial channel stop register m (STm)
The STm is a trigger register that is used to enable stopping communication/count by each channel.
When 1 is written to a bit (STmn) of this register, the corresponding bit (SEmn) of serial channel enable status register m
(SEm) is cleared to 0 (operation is stopped). Because the STmn bit is a trigger bit, it is cleared immediately when SEmn
= 0.
The STm register can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of the STm register can be set with a 1-bit or 8-bit memory manipulation instruction with STmL.
The value of each STm register is 0000H following a reset.
Figure 12-11. Format of Serial Channel Stop Register m (STm)
Address: F0124H, F0125H (ST0) After reset: 0000H R/W
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ST0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ST01 ST00
STmn Operation stop trigger of channel n
0 No trigger operation
1 Clears the SEmn bit to 0 and stops the communication operation
Note 1
Note 1. The values of the control registers and shift register, the states of the SCKmn and SOmn pins, and the values
of the FEFmn, PEFmn, and OVFmn flags are retained.
Caution Be sure to clear bits 15 to 2 of the ST0 register to 0.
Remark 1. m: Unit number (m = 0), n: Channel number (n = 0, 1)
Remark 2. When the STm register is read, 0000H is always read.
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