RL78/G15 CHAPTER 3 CPU ARCHITECTURE
R01UH0959EJ0110 Rev.1.10 Page 80 of 765
Mar 7, 2023
3.4.3 Table indirect addressing
[Function]
Table indirect addressing specifies a table address in the CALLT table area (0080H to 00BFH) with the 5-bit immediate
data in the instruction word, stores the contents at that table address and the next address in the program counter (PC)
as 16-bit data, and specifies the program address. Table indirect addressing is applied only for CALLT instructions.
In the RL78 microcontrollers, branching is enabled only to the 64 KB space from 00000H to 0FFFFH.
Figure 3-13. Outline of Table Indirect Addressing
PC
S
PC
H
PC
L
0000
OP-
code
Memory
High Addr.
Low Addr.
0 0 0 0 0 0 0 0
10 0
PC
3.4.4 Register indirect addressing
[Function]
Register indirect addressing stores in the program counter (PC) the contents of a general-purpose register pair
(AX/BC/DE/HL) and CS register of the current register bank specified with the instruction word as 20-bit data, and
specifies the program address. Register indirect addressing can be applied only to the CALL AX, BC, DE, HL, and BR
AX instructions.
Figure 3-14. Outline of Register Indirect Addressing
PC
L
rp
Instruction code
PC
H
PC
S
PC
CS
OP-code
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