RL78/G15 CHAPTER 5 CLOCK GENERATOR
R01UH0959EJ0110 Rev.1.10 Page 129 of 765
Mar 7, 2023
CHAPTER 5 CLOCK GENERATOR
5.1 Functions of Clock Generator
The clock generator generates the clock to be supplied to the CPU and peripheral hardware.
The following three kinds of system clocks and clock oscillators are selectable.
1) Main system clock
<1> X1 oscillator (16-pin and 20-pin products only)
This circuit oscillates a clock of f
X
= 1 to 12 MHz by connecting a resonator to X1 and X2 pins.
The external main system clock (f
EX
= 1 to 16 MHz) can also be supplied from EXCLK/X2/P122 pin.
Oscillation can be stopped by executing the STOP instruction or setting of the MSTOP bit (bit 7 of the clock
operation status control register (CSC)).
<2> High-speed on-chip oscillator
The frequency at which to oscillate can be selected from among f
IH
= 16/8/4/2/1 MHz (typ.) by using the option byte
(000C2H). After a reset release, the CPU always starts operating with this high-speed on-chip oscillator clock.
Oscillation can be stopped by executing the STOP instruction or setting the HIOSTOP bit (bit 0 of the CSC
register).
The frequency specified by using an option byte can be changed by using the high-speed on-chip oscillator
frequency select register (HOCODIV). For details about the frequency, see Figure 5-9 Format of High-speed On-
chip Oscillator Frequency Select Register (HOCODIV).
The frequencies that can be specified for the high-speed on-chip oscillator by using the option byte and the high-speed
on-chip oscillator frequency select register (HOCODIV) are shown below.
Power Supply Voltage Oscillation Frequency (MHz)
1 2 4 8 16
2.4 V ≤ V
DD
≤ 5.5 V
Remark : Can operate, — : Cannot operate
As the main system clock, a high-speed system clock (X1 clock) or high-speed on-chip oscillator clock can be selected
by setting of the MCM0 bit (bit 4 of the system clock control register (CKC)).
The external main system clock (f
EX
= 1 to 16 MHz) can also be supplied from EXCLK/X2/P122 pin. An external main
system clock input can be disabled by executing the STOP instruction or setting of the MSTOP bit.
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