RL78/G15 CHAPTER 10 A/D CONVERTER
R01UH0959EJ0110 Rev.1.10 Page 328 of 765
Mar 7, 2023
10.3.5 8-bit A/D conversion result register (ADCRH)
This is an 8-bit register which holds the result of A/D conversion. When A/D conversion ends, the conversion result is
loaded from the successive approximation register (SAR). In the case of 10-bit resolution, the eight higher-order bits are
stored.
The ADCRH register can be read by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 10-8. Format of 8-bit A/D Conversion Result Register (ADCRH)
Address: FFF1FH After reset: 00H R
Symbol 7 6 5 4 3 2 1 0
ADCRH ADCR9 ADCR8 ADCR7 ADCR6 ADCR5 ADCR4 ADCR3 ADCR2
Caution When writing to A/D converter mode register 0 (ADM0) and the analog input channel specification
register (ADS), the contents of the ADCR/ADCRH registers may become undefined. After conversion
ends, read the conversion result before writing to the ADM0 and ADS registers. Using timing other
than the above may cause an incorrect conversion result to be read.
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