Renesas RL78/G15

RL78/G15 CHAPTER 6 TIMER ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 226 of 765
Mar 7, 2023
6.7.3 Cautions on channel input operation
When a timer input pin is set as unused, the operation clock is not supplied to the noise filter. Therefore, after settings
are made to use the timer input pin, the following wait time is necessary before a trigger is specified to enable operation
of the channel corresponding to the timer input pin.
1) Noise filter is disabled
When bits 12 (CCSmn), 9 (STSmn1), and 8 (STSmn0) in the timer mode register mn (TMRmn) are 0 and then one of
them is set to 1, wait for at least two cycles of the operation clock (f
MCK
), and then set the operation enable trigger bit in
the timer channel start register (TSm).
2) Noise filter is enabled
When bits 12 (CCSmn), 9 (STSmn1), and 8 (STSmn0) in the timer mode register mn (TMRmn) are all 0 and then one of
them is set to 1, wait for at least four cycles of the operation clock (f
MCK
), and then set the operation enable trigger bit in
the timer channel start register (TSm).