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Renesas RL78/G15

Renesas RL78/G15
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RL78/G15 CHAPTER 3 CPU ARCHITECTURE
R01UH0959EJ0110 Rev.1.10 Page 68 of 765
Mar 7, 2023
3.3.2 General-purpose registers
General-purpose registers are mapped at particular addresses (FFEE0H to FFEFFH) of the data memory. The general-
purpose registers consists of 4 banks, each bank consisting of eight 8-bit registers (X, A, C, B, E, D, L, and H).
Each register can be used as an 8-bit register, and two 8-bit registers can also be used in a pair as a 16-bit register (AX,
BC, DE, and HL).
Register banks to be used for instruction execution are set by the CPU control instruction (SEL RBn). Because of the 4-
register bank configuration, an efficient program can be created by switching between a register for normal processing
and a register for interrupt processing for each bank.
Caution It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for fetching
instructions or as a stack area.
Figure 3-7. Configuration of General-Purpose Registers
(a) Function name
FFEFFH
FFEF8H
FFEF0H
FFEE8H
FFEE0H
HL
DE
BC
AX
Register bank 0
Register bank 1
Register bank 2
Register bank 3
H
L
D
E
B
C
A
X
16-bit processing 8-bit processing
15 0 7 0

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