NXP Semiconductors MC9S12G - Page 1248

Detailed Register Address Map
MC9S12G Family Reference Manual Rev.1.27
1250 NXP Semiconductors
0x027C PIE0AD
R
PIE0AD7 PIE0AD6 PIE0AD5 PIE0AD4 PIE0AD3 PIE0AD2 PIE0AD1 PIE0AD0
W
0x027D PIE1AD
R
PIE1AD7 PIE1AD6 PIE1AD5 PIE1AD4 PIE1AD3 PIE1AD2 PIE1AD1 PIE1AD0
W
0x027E PIF0AD
R
PIF0AD7 PIF0AD6 PIF0AD5 PIF0AD4 PIF0AD3 PIF0AD2 PIF0AD1 PIF0AD0
W
0x027F PIF1AD
R
PIF1AD7 PIF1AD6 PIF1AD5 PIF1AD4 PIF1AD3 PIF1AD2 PIF1AD1 PIF1AD0
W
0x0280–0x2EF Reserved
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0280-
0x02EF
Reserved
R00000000
W
0x02F0–0x02FF Clock and Power Management (CPMU) Map 2 of 2
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x02F0 Reserved
R00000000
W
0x02F1 CPMULVCTL
R00 000LVDS
LVIE LVIF
W
0x02F2 CPMUAPICTL
R
APICLK
00
APIES APIEA APIFE APIE APIF
W
0x02F3
CPMUACLKT
R
R
ACLKTR5 ACLKTR4 ACLKTR3 ACLKTR2 ACLKTR1 ACLKTR0
00
W
0x02F4 CPMUAPIRH
R
APIR15 APIR14 APIR13 APIR12 APIR11 APIR10 APIR9 APIR8
W
0x02F5 CPMUAPIRL
R
APIR7 APIR6 APIR5 APIR4 APIR3 APIR2 APIR1 APIR0
W
0x02F6 Reserved
R00000000
W
0x02F7 Reserved
R00000000
W
0x02F8
CPMU
IRCTRIMH
R
TCTRIM[3:0]
00
IRCTRIM[9:8]
W
0x02F9
CPMU
IRCTRIML
R
IRCTRIM[7:0]
W
0x02FA CPMUOSC
R
OSCE Reserved
OSCPINS_E
N
Reserved
W
0x0277–0x027F Port Integration Module (PIM) Map 6 of 6
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0