NXP Semiconductors MC9S12G - Chapter 21 Serial Peripheral Interface (S12 SPIV5)

MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 691
Chapter 21
Serial Peripheral Interface (S12SPIV5)
Revision History
21.1 Introduction
The SPI module allows a duplex, synchronous, serial communication between the MCU and peripheral
devices. Software can poll the SPI status flags or the SPI operation can be interrupt driven.
21.1.1 Glossary of Terms
21.1.2 Features
The SPI includes these distinctive features:
• Master mode and slave mode
• Selectable 8 or 16-bit transfer width
• Bidirectional mode
• Slave select output
• Mode fault error flag with CPU interrupt capability
Revision Number Date Author Summary of Changes
05.00 24 MAR 2005 Added 16-bit transfer width feature.
SPI
Serial Peripheral Interface
SS
Slave Select
SCK
Serial Clock
MOSI
Master Output, Slave Input
MISO
Master Input, Slave Output
MOMI
Master Output, Master Input
SISO
Slave Input, Slave Output