NXP Semiconductors MC9S12G User Manual

MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 305
Chapter 8
S12S Debug Module (S12SDBGV2)
Table 8-1. Revision History
8.1 Introduction
The S12SDBG module provides an on-chip trace buffer with flexible triggering capability to allow
non-intrusive debug of application software. The S12SDBG module is optimized for S12SCPU
debugging.
Typically the S12SDBG module is used in conjunction with the S12SBDM module, whereby the user
configures the S12SDBG module for a debugging session over the BDM interface. Once configured the
S12SDBG module is armed and the device leaves BDM returning control to the user program, which is
then monitored by the S12SDBG module. Alternatively the S12SDBG module can be configured over a
serial interface using SWI routines.
8.1.1 Glossary Of Terms
COF: Change Of Flow. Change in the program flow due to a conditional branch, indexed jump or interrupt
BDM: Background Debug Mode
S12SBDM: Background Debug Module
DUG: Device User Guide, describing the features of the device into which the DBG is integrated
WORD: 16-bit data entity
Data Line: 20-bit data entity
CPU: S12SCPU module
DBG: S12SDBG module
POR: Power On Reset
Revision Number
Revision
Date
Sections
Affected
Summary of Changes
02.08 09.MAY.2008 General Spelling corrections. Revision history format changed.
02.09 29.MAY.2008 8.4.5.4 Added note for end aligned, PurePC, rollover case.
02.10 27.SEP.2012 General Changed cross reference formats

NXP Semiconductors MC9S12G Specifications

General

Brand	NXP Semiconductors
Model	MC9S12G
Category	Microcontrollers
Language	English