MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 429
Chapter 12
Analog-to-Digital Converter (ADC12B8CV2)
Revision History
12.1 Introduction
The ADC12B8C is a 8-channel, 12-bit, multiplexed input successive approximation analog-to-digital
converter. Refer to device electrical specifications for ATD accuracy.
Version
Number
Revision
Date
Effective
Date
Author Description of Changes
V02.00 13 May 2009 13 May 2009
Initial version copied from V01.05,
changed unused Bits in ATDDIEN to read logic 1
V02.01 17 Dec 2009 17 Dec 2009
Updated Table 12-15 Analog Input Channel Select Coding -
description of internal channels.
Updated register ATDDR (left/right justified result) description
in section 12.3.2.12.1/12-449 and 12.3.2.12.2/12-450 and
added Table 12-21 to improve feature description.
V02.02 09 Feb 2010 09 Feb 2010
Fixed typo in Table 12-9 - conversion result for 3mV and 10bit
resolution
V02.03 26 Feb 2010 26 Feb 2010
Corrected Table 12-15 Analog Input Channel Select Coding -
description of internal channels.
V02.04 14 Apr 2010 14 Apr 2010
Corrected typos to be in-line with SoC level pin naming
conventions for VDDA, VSSA, VRL and VRH.
V02.05 25 Aug 2010 25 Aug 2010
Removed feature of conversion during STOP and general
wording clean up done in Section 12.4, “Functional
Description
V02.06 09 Sep 2010 09 Sep 2010 Update of internal only information.
V02.07 11 Feb 2011 11 Feb 2011
Connectivity Information regarding internal channel_6 added
to Table 12-15.
V02.08 22. Jun 2012 22. Jun 2012
Updated register wirte access information in section
12.3.2.9/12-447
V02.09 29. Jun 2012 29 Jun 2012 Removed IP name in block diagram Figure 12-1
V02.10 02 Oct 2012 02 Oct 2012
Added user information to avoid maybe false external trigger
events when enabling the external trigger mode
(Section 12.4.2.1, “External Trigger Input).
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