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NXP Semiconductors MC9S12G - External Oscillator

NXP Semiconductors MC9S12G
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S12 Clock, Reset and Power Management Unit (S12CPMU)
MC9S12G Family Reference Manual Rev.1.27
392 NXP Semiconductors
Disable PLL Lock interrupt (LOCKIE=0) and oscillator status change interrupt (OSCIE=0) before going
into Full Stop Mode.
Figure 10-32. Full Stop Mode using Oscillator Clock as Bus Clock
10.4.5 External Oscillator
10.4.5.1 Enabling the External Oscillator
An example of how to use the oscillator as Bus Clock is shown in Figure 10-33.
CPU
UPOSC
t
lock
STOP instruction
execution
interrupt continue execution
wakeup
t
STP_REC
Core
Clock
select OSCCLK as Core/Bus Clock by writing PLLSEL to “0”
PLLSEL
automatically set when going into Full Stop Mode
OSCCLK
PLLCLK

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