Analog-to-Digital Converter (ADC10B12CV2)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 479
13.5 Resets
At reset the ADC10B12C is in a power down state. The reset state of each individual bit is listed within
the Register Description section (see Section 13.3.2, “Register Descriptions”) which details the registers
and their bit-field.
13.6 Interrupts
The interrupts requested by the ADC10B12C are listed in Table 13-24. Refer to MCU specification for
related vector address and priority.
See Section 13.3.2, “Register Descriptions” for further details.
Table 13-24. ATD Interrupt Vectors
Interrupt Source
CCR
Mask
Local Enable
Sequence Complete Interrupt I bit ASCIE in ATDCTL2
Compare Interrupt I bit ACMPIE in ATDCTL2
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