NXP Semiconductors MC9S12G User Manual

Scalable Controller Area Network (S12MSCANV3)
MC9S12G Family Reference Manual Rev.1.27
570 NXP Semiconductors
18.1.1 Glossary
18.1.2 Block Diagram
Figure 18-1. MSCAN Block Diagram
Table 18-2. Terminology
ACK Acknowledge of CAN message
CAN Controller Area Network
CRC Cyclic Redundancy Code
EOF End of Frame
FIFO First-In-First-Out Memory
IFS Inter-Frame Sequence
SOF Start of Frame
CPU bus CPU related read/write data bus
CAN bus CAN protocol related serial bus
oscillator clock Direct clock from external oscillator
bus clock CPU bus related clock
CAN clock CAN protocol related clock
RXCAN
TXCAN
Receive/
Transmit
Engine
Message
Filtering
and
Buffering
Control
and
Status
Wake-Up Interrupt Req.
Errors Interrupt Req.
Receive Interrupt Req.
Transmit Interrupt Req.
CANCLK
Bus Clock
Configuration
Oscillator Clock
MUX Presc.
Tq Clk
MSCAN
Low Pass Filter
Wake-Up
Registers

NXP Semiconductors MC9S12G Specifications

General

Brand	NXP Semiconductors
Model	MC9S12G
Category	Microcontrollers
Language	English