NXP Semiconductors MC9S12G - Register Descriptions

S12G Memory Map Controller (S12GMMCV1)
MC9S12G Family Reference Manual Rev.1.27
262 NXP Semiconductors
5.3.2 Register Descriptions
This section consists of the S12GMMC control register descriptions in address order.
5.3.2.1 Mode Register (MODE)
Address
Register
Name
Bit 765432 1Bit 0
0x000A Reserved R 0 0 0 0 0 0 0 0
W
0x000B MODE R
MODC
00000 0 0
W
0x0010 Reserved R 0 0 0 0 0 0 0 0
W
0x0011 DIRECT R
DP15 DP14 DP13 DP12 DP11 DP10 DP9 DP8
W
0x0012 Reserved R 0 0 0 0 0 0 0 0
W
0x0013 MMCCTL1 R 0 0 0 0 0 0 0
NVMRES
W
0x0014 Reserved R 0 0 0 0 0 0 0 0
W
0x0015 PPAGE R 0 0 0 0
PIX3 PIX2 PIX1 PIX0
W
0x0016-
0x0017
ReservedR000000 0 0
W
= Unimplemented or Reserved
Figure 5-2. MMC Register Summary
Address: 0x000B
76543210
R
MODC
0000000
W
Reset MODC
1
0000000
1. External signal (see Table 5-3).
= Unimplemented or Reserved
Figure 5-3. Mode Register (MODE)