Timer Module (TIM16B6CV3)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 733
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The Prescaler can be calculated as follows depending on logical value of the PTPS[7:0] and PRNT bit:
PRNT = 1 : Prescaler = PTPS[7:0] + 1
Table 22-17. Precision Timer Prescaler Selection Examples when PRNT = 1
22.4 Functional Description
This section provides a complete functional description of the timer TIM16B6CV3 block. Please refer to
the detailed timer block diagram in Figure 22-22 as necessary.
Table 22-16. PTPSR Field Descriptions
Field Description
7:0
PTPS[7:0]
Precision Timer Prescaler Select Bits — These eight bits specify the division rate of the main Timer prescaler.
These are effective only when the PRNT bit of TSCR1 is set to 1. Table 22-17 shows some selection examples
in this case.
The newly selected prescale factor will not take effect until the next synchronized edge where all prescale counter
stages equal zero.
PTPS7 PTPS6 PTPS5 PTPS4 PTPS3 PTPS2 PTPS1 PTPS0
Prescale
Factor
00000000 1
00000001 2
00000010 3
00000011 4
-------- -
-------- -
-------- -
00010011 20
00010100 21
00010101 22
-------- -
-------- -
-------- -
11111100 253
11111101 254
11111110 255
11111111 256
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