Background Debug Module (S12SBDMV1)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 287
Write: All modes through BDM operation when not secured
NOTE
When BDM is made active, the CPU stores the content of its CCR register
in the BDMCCR register. However, out of special single-chip reset, the
BDMCCR is set to 0xD8 and not 0xD0 which is the reset value of the CCR
register in this CPU mode. Out of reset in all other modes the BDMCCR
register is read zero.
When entering background debug mode, the BDM CCR holding register is used to save the condition code
register of the user’s program. It is also used for temporary storage in the standard BDM firmware mode.
The BDM CCR holding register can be written to modify the CCR value.
7.3.2.2 BDM Program Page Index Register (BDMPPR)
Figure 7-5. BDM Program Page Register (BDMPPR)
Read: All modes through BDM operation when not secured
Write: All modes through BDM operation when not secured
7.3.3 Family ID Assignment
The family ID is an 8-bit value located in the BDM ROM in active BDM (at global address: 0x3_FF0F).
The read-only value is a unique family ID which is 0xC2 for devices with an HCS12S core.
7.4 Functional Description
The BDM receives and executes commands from a host via a single wire serial interface. There are two
types of BDM commands: hardware and firmware commands.
Register Global Address 0x3_FF08
7 6 5 4 3 2 1 0
R
BPAE
0 0 0
BPP3 BPP2 BPP1 BPP0
W
Reset 0 0 0 0 0 0 0 0
= Unimplemented, Reserved
Table 7-4. BDMPPR Field Descriptions
Field Description
7
BPAE
BDM Program Page Access Enable Bit — BPAE enables program page access for BDM hardware and
firmware read/write instructions The BDM hardware commands used to access the BDM registers (READ_BD
and WRITE_BD) can not be used for program page accesses even if the BPAE bit is set.
0 BDM Program Paging disabled
1 BDM Program Paging enabled
3–0
BPP[3:0]
BDM Program Page Index Bits 3–0 — These bits define the selected program page. For more detailed
information regarding the program page window scheme, please refer to the S12S_MMC Block Guide.
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