32 KByte Flash Module (S12FTMRG32K1V1)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 863
8. Reset the MCU
25.5.3 Mode and Security Effects on Flash Command Availability
The availability of Flash module commands depends on the MCU operating mode and security state as
shown in Table 25-27.
25.6 Initialization
On each system reset the flash module executes an initialization sequence which establishes initial values
for the Flash Block Configuration Parameters, the FPROT and EEPROT protection registers, and the
FOPT and FSEC registers. The initialization routine reverts to built-in default values that leave the module
in a fully protected and secured state if errors are encountered during execution of the reset sequence. If a
double bit fault is detected during the reset sequence, both MGSTAT bits in the FSTAT register will be set.
CCIF is cleared throughout the initialization sequence. The Flash module holds off all CPU access for a
portion of the initialization sequence. Flash reads are allowed once the hold is removed. Completion of the
initialization sequence is marked by setting CCIF high which enables user commands.
If a reset occurs while any Flash command is in progress, that command will be immediately aborted. The
state of the word being programmed or the sector/block being erased is not guaranteed.
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