Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual Rev.1.27
170 NXP Semiconductors
PP3-PP2 • Except 20 TSSOP: The PWM channels 3 and 2 signal are mapped to these pins when used with the
PWM function. The enabled PWM channel forces the I/O state to be an output.
• Except 20 TSSOP: The ADC ETRIG 3 and 2 signal are mapped to these pins when used with the ADC
function. The enabled external trigger function has no effect on the I/O state. Refer to Section 2.6.4,
“ADC External Triggers ETRIG3-0”.
• Except 20 TSSOP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
Except 20 TSSOP: PWM > GPO
PP1 • Except 20 TSSOP: The PWM channel 1 signal is mapped to this pin when used with the PWM function.
The enabled PWM channel forces the I/O state to be an output.
• Except 100 LQFP and 20 TSSOP: The ECLKX2 signal is mapped to this pin when used with the
external clock function. The enabled ECLKX2 forces the I/O state to an output.
• Except 20 TSSOP: The ADC ETRIG1 signal is mapped to this pin when used with the ADC function.
The enabled external trigger function has no effect on the I/O state. Refer to Section 2.6.4, “ADC
External Triggers ETRIG3-0”.
• Except 20 TSSOP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
Except 100 LQFP and 20 TSSOP: PWM1 > ECLKX2 > GPO
100 LQFP: PWM1 > GPO
PP0 • Except 20 TSSOP: The PWM channel 0 signal is mapped to this pin when used with the PWM function.
The enabled PWM channel forces the I/O state to be an output.
• Except 100 LQFP and 20 TSSOP: The API_EXTCLK signal is mapped to this pin when used with the
external clock function. If the Autonomous Periodic Interrupt clock is enabled and routed here the I/O
state is forced to output.
• Except 20 TSSOP: The ADC ETRIG0 signal is mapped to this pin when used with the ADC function.
The enabled external trigger function has no effect on the I/O state. Refer to Section 2.6.4, “ADC
External Triggers ETRIG3-0”.
• Except 20 TSSOP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
Except 100 LQFP and 20 TSSOP: PWM0 > API_EXTCLK > GPO
100 LQFP: PWM0 > GPO
Table 2-14. Port P Pins PP7-0 (continued)
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