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NXP Semiconductors MC9S12G - Page 277

NXP Semiconductors MC9S12G
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Interrupt Module (S12SINTV1)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 279
If the X bit maskable interrupt request is used to wake-up the MCU with the X bit in the CCR set, the
associated ISR is not called. The CPU then resumes program execution with the instruction following the
WAI or STOP instruction. This features works following the same rules like any interrupt request, that is
care must be taken that the X interrupt request used for wake-up remains active at least until the system
begins execution of the instruction following the WAI or STOP instruction; otherwise, wake-up may not
occur.

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