NXP Semiconductors MC9S12G - Page 326

S12S Debug Module (S12SDBGV2)
MC9S12G Family Reference Manual Rev.1.27
328 NXP Semiconductors
8.4.2.1.4 Comparator A Data Bus Comparison NDB Dependency
Comparator A features an NDB control bit, which allows data bus comparators to be configured to either
trigger on equivalence or trigger on difference. This allows monitoring of a difference in the contents of
an address location from an expected value.
When matching on an equivalence (NDB=0), each individual data bus bit position can be masked out by
clearing the corresponding mask bit (DBGADHM/DBGADLM) so that it is ignored in the comparison. A
match occurs when all data bus bits with corresponding mask bits set are equivalent. If all mask register
bits are clear, then a match is based on the address bus only, the data bus is ignored.
When matching on a difference, mask bits can be cleared to ignore bit positions. A match occurs when any
data bus bit with corresponding mask bit set is different. Clearing all mask bits, causes all bits to be ignored
and prevents a match because no difference can be detected. In this case address bus equivalence does not
cause a match.
8.4.2.2 Range Comparisons
Using the AB comparator pair for a range comparison, the data bus can also be used for qualification by
using the comparator A data registers. Furthermore the DBGACTL RW and RWE bits can be used to
qualify the range comparison on either a read or a write access. The corresponding DBGBCTL bits are
ignored. The SZE and SZ control bits are ignored in range mode. The comparator A TAG bit is used to tag
0 X $FF00 Byte, data(ADDR[n])=DH
Word, data(ADDR[n])=DH, data(ADDR[n+1])=X
Match data( ADDR[n])
0 X $00FF Word, data(ADDR[n])=X, data(ADDR[n+1])=DL Match data( ADDR[n+1])
0 X $00FF Byte, data(ADDR[n])=X, data(ADDR[n+1])=DL Possible unintended match
0 X $FFFF Word, data(ADDR[n])=DH, data(ADDR[n+1])=DL Match data( ADDR[n], ADDR[n+1])
0 X $FFFF Byte, data(ADDR[n])=DH, data(ADDR[n+1])=DL Possible unintended match
1 0 $0000 Word No databus comparison
1 0 $00FF Word, data(ADDR[n])=X, data(ADDR[n+1])=DL Match only data at ADDR[n+1]
1 0 $FF00 Word, data(ADDR[n])=DH, data(ADDR[n+1])=X Match only data at ADDR[n]
1 0 $FFFF Word, data(ADDR[n])=DH, data(ADDR[n+1])=DL Match data at ADDR[n] & ADDR[n+1]
1 1 $0000 Byte No databus comparison
1 1 $FF00 Byte, data(ADDR[n])=DH Match data at ADDR[n]
Table 8-35. NDB and MASK bit dependency
NDB
DBGADHM[n] /
DBGADLM[n]
Comment
0 0 Do not compare data bus bit.
0 1 Compare data bus bit. Match on equivalence.
1 0 Do not compare data bus bit.
1 1 Compare data bus bit. Match on difference.
SZE SZ
DBGADHM,
DBGADLM
Access
DH=DBGADH, DL=DBGADL
Comment