S12S Debug Module (S12SDBGV2)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 345
is generated. Configuring CompA and CompC the same, it is possible to generate a breakpoint on the third
consecutive occurrence of event M0 without a reset M1.
Figure 8-40. Scenario 10a
Figure 8-41. Scenario 10b
Scenario 10b shows the case that after M2 then M1 must occur before M0. Starting from a particular point
in code, event M2 must always be followed by M1 before M0. If after any M2, event M0 occurs before
M1 then a trigger is generated.
State1
Final State
State3
State2
SCR1=0010
SCR2=0100
SCR3=0010
M2
M2
M0
M1
M1
State1
Final State
State3
State2
SCR1=0010
SCR2=0011
SCR3=0000
M2
M1
M0
M0
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