NXP Semiconductors MC9S12G - Page 459

Analog-to-Digital Converter (ADC10B12CV2)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 461
0x0024 ATDDR10
R
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0026 ATDDR11
R
See Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0028 -
0x002F
Unimple-
mented
R
0 000 0 0 0 0
W
Address Name Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved
Figure 13-2. ADC10B12C Register Summary (Sheet 3 of 3)