RL78/G15 CHAPTER 10 A/D CONVERTER
R01UH0959EJ0110 Rev.1.10 Page 319 of 765
Mar 7, 2023
5) Successive approximation register (SAR)
The SAR register is used to set voltage tap data whose values from the comparison voltage generator match the voltage
values of the analog input pins, one bit at a time starting from the most significant bit (MSB).
If data is set in the SAR register all the way to the least significant bit (LSB) (end of A/D conversion), the contents of the
SAR register (conversion results) are held in the A/D conversion result register (ADCR). When all the specified A/D
conversion operations have ended, an A/D conversion end interrupt request signal (INTAD) is generated.
6) 10-bit A/D conversion result register (ADCR)
Each time A/D conversion is completed, the conversion result is loaded from the successive approximation register and
the ten higher-order bits of the A/D conversion result are held in this register (the six lower-order bits are fixed to 0).
7) 8-bit A/D conversion result register (ADCRH)
Each time A/D conversion is completed, the conversion result is loaded from the successive approximation register and
the eight higher-order bits of the A/D conversion result are held in this register.
8) Controller
This circuit controls the conversion time of an analog input signal that is to be converted into a digital signal, as well as
starting and stopping of the conversion operation. When A/D conversion has been completed, this controller generates
an A/D conversion end interrupt request signal (INTAD).
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