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RL78/G15 CHAPTER 12 SERIAL ARRAY UNIT

R01UH0959EJ0110 Rev.1.10 Page 468 of 765

Mar 7, 2023

(4) Processing flow (in continuous transmission mode)

Figure 12-74. Timing Chart of UART Transmission (in Continuous Transmission Mode)

Shift

TxDq pin

Data transmission

SSmn

STmn

SEmn

SDRmn

INTSTq

TSFmn

Transmit data

Transmit data 2 Transmit data

Transmit data 3

Shift operation

BFFmn

MDmn0

<4>

<2><3> <2> <3> <2> <3> <5>

Note 1

ST P SP ST

P SP

Shift operation

Transmit data

Transmit data 1

Data transmission Data transmission

Note 1. If transmit data is written to the SDRmn register while the BFFmn bit of serial status register mn (SSRmn) is 1

(valid data is stored in serial data register mn (SDRmn)), the transmit data is overwritten.

Caution The MDmn0 bit of serial mode register mn (SMRmn) can be rewritten even during operation. However,

rewrite it before transfer of the last bit is started, so that it has been rewritten before the transfer end

interrupt of the last transmit data.

Remark m: Unit number (m = 0), n: Channel number (n = 0), q: UART number (q = 0), mn = 00

Renesas RL78/G15 User Manual

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