RL78/G15 CHAPTER 13 SERIAL INTERFACE IICA
R01UH0959EJ0110 Rev.1.10 Page 576 of 765
Mar 7, 2023
(5) Arbitration loss operation (operation as slave after arbitration loss)
To use the device as a master in the multi-master system, read the MSTS0 bit to check the arbitration result each time
interrupt request signal INTIICA0 is generated.
(a) When lost in arbitration during transmission of slave address data
(i) When WTIM0 = 0
4
1
2
3
ST
AD6-AD0
R/W
D7
-D
0
SP
ACK
ACK
ACK
D7-D0
1: IICS0 = 0101×110B
2: IICS0 = 0001×000B
3: IICS0 = 0001×000B
4: IICS0 = 00000001B
Remark : Always generated
: Generated only when SPIE0 = 1
×: Don’t care
(ii) When WTIM0 = 1
41 2 3
ST AD6-AD0 R/W D7-D0 SPACK ACKACK D7-D0
1: IICS0 = 0101×110B
2: IICS0 = 0001×100B
3: IICS0 = 0001××00B
4: IICS0 = 00000001B
Remark : Always generated
: Generated only when SPIE0 = 1
×: Don’t care