RL78/G15 CHAPTER 15 STANDBY FUNCTION
R01UH0959EJ0110 Rev.1.10 Page 632 of 765
Mar 7, 2023
Figure 15-3. STOP Mode Release by Interrupt Request Generation (2/3)
(2) When high-speed system clock (X1 oscillation) is used as CPU clock (16-pin and 20-pin products only)
Standby release
signal
Note 1
Supply of the clock
is stopped
Oscillates
Status of CPU
High-speed system clock
(X1 oscillation)
Normal operation
(high
-
speed system
clock)
STOP mode
Oscillates
Normal operation
(high-speed system clock)
Interrupt request
Wait
Oscillation stopped
STOP mode release time
Note 2
STOP instruction
Note 1. For details of the standby release signal, see Figure 14-1 Basic Configuration of Interrupt Function.
Note 2. STOP mode release time: Whichever is longer, 27 µs (TYP.) or the oscillation stabilization time (set by
OSTS)
[Wait]
When vectored interrupt servicing is carried out: 10 or 11 clocks
When vectored interrupt servicing is not carried out: 4 or 5 clocks
Caution To reduce the oscillation stabilization time after release from the STOP mode while CPU operates
based on the high-speed system clock (X1 oscillation), switch the clock to the high-speed on-chip
oscillator clock temporarily before executing the STOP instruction.
Remark 1. The clock supply stop time varies depending on the temperature conditions and STOP mode period.
Remark 2. The broken lines indicate the case when the interrupt request that has released the standby mode is
acknowledged.
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